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 *       notice, this list of conditions and the following disclaimer.
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 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
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 *
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/**************************************************************************//**
 @File          ppc_ext.h

 @Description   Core API for PowerPC cores

                These routines must be implemented by each specific PowerPC
                core driver.
*//***************************************************************************/
#ifndef __PPC_EXT_H
#define __PPC_EXT_H

#include "part_ext.h"


#define CORE_IS_BIG_ENDIAN


/**************************************************************************//**
 @Function      CORE_TestAndSet

 @Description   This routine tries to atomically test-and-set an integer
                in memory to a non-zero value.

                The memory will be set only if it is tested as zero, in which
                case the routine returns the new non-zero value; otherwise the
                routine returns zero.

 @Param[in]     p - pointer to a volatile int in memory, on which test-and-set
                    operation should be made.

 @Retval        Zero        - Operation failed - memory was already set.
 @Retval        Non-zero    - Operation succeeded - memory has been set.
*//***************************************************************************/
int CORE_TestAndSet(volatile int *p);

/**************************************************************************//**
 @Function      CORE_InstructionSync

 @Description   This routine will cause the core to wait for previous instructions
                (including any interrupts they generate) to complete before the
                synchronization command executes, which purges all instructions
                from the processor's pipeline and refetches the next instruction.

 @Return        None.
*//***************************************************************************/
void CORE_InstructionSync(void);

/**************************************************************************//**
 @Function      CORE_DCacheEnable

 @Description   Enables the data cache for memory pages that are
                not cache inhibited.

 @Return        None.
*//***************************************************************************/
void CORE_DCacheEnable(void);

/**************************************************************************//**
 @Function      CORE_ICacheEnable

 @Description   Enables the instruction cache for memory pages that are
                not cache inhibited.

 @Return        None.
*//***************************************************************************/
void CORE_ICacheEnable(void);

/**************************************************************************//**
 @Function      CORE_DCacheDisable

 @Description   Disables the data cache.

 @Return        None.
*//***************************************************************************/
void CORE_DCacheDisable(void);

/**************************************************************************//**
 @Function      CORE_ICacheDisable

 @Description   Disables the instruction cache.

 @Return        None.
*//***************************************************************************/
void CORE_ICacheDisable(void);




#if defined(CORE_E300)
#include "e300_ext.h"
#elif defined(CORE_E500V2) || defined(CORE_E500MC)
#include "e500v2_ext.h"
#else
#error "Core not defined!"
#endif


#endif /* __PPC_EXT_H */