# Check generation of .MIPS.abiflags section under the following conditions:
# - There are multiple input object files
# - Every input file has valid .MIPS.abiflags section
# - .MIPS.abiflags sections have different but compatible FP ABI
#
# The .MIPS.abiflags section in the output file should reproduce result
# of merging FP ABI flags.

# RUN: yaml2obj -format=elf -docnum 1 %s > %t-xx.o
# RUN: yaml2obj -format=elf -docnum 2 %s > %t-double.o
# RUN: yaml2obj -format=elf -docnum 3 %s > %t-64.o
# RUN: yaml2obj -format=elf -docnum 4 %s > %t-64a.o

# RUN: lld -flavor old-gnu -target mipsel -shared -o %t1 %t-xx.o %t-double.o
# RUN: llvm-readobj -mips-abi-flags %t1 | FileCheck -check-prefix=XX-DOUBLE %s

# XX-DOUBLE:  FP ABI:     Hard float (double precision) (0x1)
# XX-DOUBLE:  GPR size:   32
# XX-DOUBLE:  CPR1 size:  32
# XX-DOUBLE:  Flags 1     [ (0x0)

# RUN: lld -flavor old-gnu -target mipsel -shared -o %t2 %t-xx.o %t-64.o
# RUN: llvm-readobj -mips-abi-flags %t2 | FileCheck -check-prefix=XX-64 %s

# XX-64:  FP ABI:     Hard float (32-bit CPU, 64-bit FPU) (0x6)
# XX-64:  GPR size:   32
# XX-64:  CPR1 size:  64
# XX-64:  Flags 1     [ (0x1)
# XX-64:    ODDSPREG (0x1)

# RUN: lld -flavor old-gnu -target mipsel -shared -o %t3 %t-xx.o %t-64a.o
# RUN: llvm-readobj -mips-abi-flags %t3 | FileCheck -check-prefix=XX-64A %s

# XX-64A:  FP ABI:     Hard float compat (32-bit CPU, 64-bit FPU) (0x7)
# XX-64A:  GPR size:   32
# XX-64A:  CPR1 size:  64
# XX-64A:  Flags 1     [ (0x0)

# RUN: lld -flavor old-gnu -target mipsel -shared -o %t4 %t-64.o %t-64a.o
# RUN: llvm-readobj -mips-abi-flags %t4 | FileCheck -check-prefix=64-64A %s

# 64-64A:  FP ABI:     Hard float (32-bit CPU, 64-bit FPU) (0x6)
# 64-64A:  GPR size:   32
# 64-64A:  CPR1 size:  64
# 64-64A:  Flags 1     [ (0x1)
# 64-64A:    ODDSPREG (0x1)

# xx.o
---
FileHeader:
  Class:   ELFCLASS32
  Data:    ELFDATA2LSB
  Type:    ET_REL
  Machine: EM_MIPS
  Flags:   [EF_MIPS_CPIC, EF_MIPS_PIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]

Sections:
- Name: .MIPS.abiflags
  Type: SHT_MIPS_ABIFLAGS
  AddressAlign: 8
  ISA:          MIPS32
  ISARevision:  1
  FpABI:        FP_XX
  GPRSize:      REG_32
  CPR1Size:     REG_32

# double.o
---
FileHeader:
  Class:   ELFCLASS32
  Data:    ELFDATA2LSB
  Type:    ET_REL
  Machine: EM_MIPS
  Flags:   [EF_MIPS_CPIC, EF_MIPS_PIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]

Sections:
- Name: .MIPS.abiflags
  Type: SHT_MIPS_ABIFLAGS
  AddressAlign: 8
  ISA:          MIPS32
  ISARevision:  1
  FpABI:        FP_DOUBLE
  GPRSize:      REG_32
  CPR1Size:     REG_32

# 64.o
---
FileHeader:
  Class:   ELFCLASS32
  Data:    ELFDATA2LSB
  Type:    ET_REL
  Machine: EM_MIPS
  Flags:   [EF_MIPS_CPIC, EF_MIPS_PIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R2]

Sections:
- Name: .MIPS.abiflags
  Type: SHT_MIPS_ABIFLAGS
  AddressAlign: 8
  ISA:          MIPS32
  ISARevision:  2
  FpABI:        FP_64
  GPRSize:      REG_32
  CPR1Size:     REG_64
  Flags1:       [ODDSPREG]

# 64a.o
---
FileHeader:
  Class:   ELFCLASS32
  Data:    ELFDATA2LSB
  Type:    ET_REL
  Machine: EM_MIPS
  Flags:   [EF_MIPS_CPIC, EF_MIPS_PIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R2]

Sections:
- Name: .MIPS.abiflags
  Type: SHT_MIPS_ABIFLAGS
  AddressAlign: 8
  ISA:          MIPS32
  ISARevision:  2
  FpABI:        FP_64A
  GPRSize:      REG_32
  CPR1Size:     REG_64
  Flags1:       []
...