# RUN: llc -O0 %s -o - 2>&1 -march=avr | FileCheck %s

# This test ensures that the pseudo expander can correctly handle the case
# where we are expanding a 16-bit LDD instruction where the source and
# destination registers are the same.
#
# The instruction itself is earlyclobber and so ISel will never produce an
# instruction like this, but the stack slot loading can and will.

--- |
  target triple = "avr--"

  define void @test_lddw() {
  entry:
    ret void
  }

...
---
name:            test_lddw
stack:
  - { id: 0, type: spill-slot, offset: -4, size: 1, alignment: 1, callee-saved-register: '%r28' }
body:             |
  bb.0.entry:
    liveins: %r28, %r29

    ; CHECK-LABEL: test_lddw

    ; CHECK:      ldd     [[TMPREG:r[0-9]+]], Y+0
    ; CHECK-NEXT: mov     r28, [[TMPREG]]
    ; CHECK-NEXT: ldd     [[TMPREG]], Y+1
    ; CHECK-NEXT: mov     r29, [[TMPREG]]
    dead early-clobber %r29r28 = LDDWRdYQ killed %r29r28, 0
...