; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx                       -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SKX
; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SKX

define <4 x i32> @test_load_v4i32_noalign(<4 x i32> * %p1) {
; ALL-LABEL: test_load_v4i32_noalign:
; ALL:       # BB#0:
; ALL-NEXT:    vmovups (%rdi), %xmm0
; ALL-NEXT:    retq
  %r = load <4 x i32>, <4 x i32>* %p1, align 1
  ret <4 x i32> %r
}

define <4 x i32> @test_load_v4i32_align(<4 x i32> * %p1) {
; ALL-LABEL: test_load_v4i32_align:
; ALL:       # BB#0:
; ALL-NEXT:    vmovaps (%rdi), %xmm0
; ALL-NEXT:    retq
  %r = load <4 x i32>, <4 x i32>* %p1, align 16
  ret <4 x i32> %r
}

define void @test_store_v4i32_noalign(<4 x i32> %val, <4 x i32>* %p1) {
; ALL-LABEL: test_store_v4i32_noalign:
; ALL:       # BB#0:
; ALL-NEXT:    vmovups %xmm0, (%rdi)
; ALL-NEXT:    retq
  store <4 x i32> %val, <4 x i32>* %p1, align 1
  ret void
}

define void @test_store_v4i32_align(<4 x i32> %val, <4 x i32>* %p1) {
; ALL-LABEL: test_store_v4i32_align:
; ALL:       # BB#0:
; ALL-NEXT:    vmovaps %xmm0, (%rdi)
; ALL-NEXT:    retq
  store <4 x i32> %val, <4 x i32>* %p1, align 16
  ret void
}